To prevent electrostatic breakdown due to static electricity in an internal circuit, some semiconductor chips incorporating an internal circuit include an electrostatic protection circuit on a pad electrode thereof. In general, such an electrostatic protection circuit is constituted by a large diode because the circuit is required to be resistant to high current generated due to the discharge of the static electricity. Attributed to the diode, large capacitors are added in parallel to the pad electrode of the semiconductor chip, causing a reduction in operating frequency of the internal circuit formed on the semiconductor chip and an increase in electric power consumption.
As an alternative external storage device of a hard disk, a solid state drive has attracted attention (Patent Document 1). Because a solid state drive employs a NAND flash memory as a nonvolatile storage medium for reading and writing data, a mechanical structure such as a hard disk is not required. This brings advantages as achieving a reduction in size and weight, low power consumption, excellent impact resistance, and short access time.
To enable a solid state drive to have an increased data capacitance, there has been a method of stacking on a single semiconductor package a plurality of semiconductor chips incorporating NAND flash memories. In stacking a plurality of semiconductor chips on a single semiconductor package, data lines and address lines of NAND flash memories are not drawn from each semiconductor chip individually on the semiconductor package. Instead, each set of the data lines and of the address lines shares one external terminal among the semiconductor chips, for the purpose of reducing the number of external terminals of the semiconductor package.
In a conventional solid state drive, however, an electrostatic protection circuit is mounted on each semiconductor chip. Thus, when one external terminal is shared among a plurality of semiconductor chips, electrostatic protection circuits as many as the semiconductor chips are connected in parallel to the external terminal. Because only one electrostatic protection circuit adds a large capacitance to the semiconductor chip, much larger capacitances are added to the external terminal in parallel. This causes a further reduction in operating frequency of the internal circuit formed on the semiconductor chip, and a further increase in electric power consumption.    [Patent Document 1] Japanese Patent Application Laid-open No. 7-302176
An object of the present invention is to provide a semiconductor device capable of reducing the capacitance to be added to external terminals, without degrading the electrostatic protection function of a plurality of semiconductor chips sharing the external terminals.